As we approach the end of Moore's law modern, complex, HPC systems are increasingly relying upon specialized accelerators in order to deliver continued performance increases for specific computational workloads. Developers of these accelerators, especially in in many low volume scientific applications, face a stark choice: spend millions on a commercial license for processors and other IP, or face the significant risk and of developing custom hardware. Rapid prototyping methods need to be explored in order to make the design, verification and programming tools for these new accelerators more accessible to the broader scientific community. To increase access and innovation while reducing cost there has been a consistent march towards open source solutions for each of these components including Facebook’s Open Compute Project and Intel's OpenHPC effort, as well as a burgeoning community surrounding RISC-V based processors.
Looking beyond accelerators that may be tightly integrated with HPC systems we see opportunities for open source hardware to include programmable logic embedded within high performance sensors and detectors for aggressive data reduction or being used in conjunction with FPGA and other reconfigurable computing based platforms. This talk will explore the emerging open source hardware effort as well as showcase new platforms for the rapid generation of future HPC accelerators.
After earning his degree in Computer Engineering at Virginia Tech, David spent seven years at Intel primarily focused on 3D graphics hardware architecture. He currently leads the Computer Architecture Group at Lawrence Berkeley National Lab. His research interests are focused on the design and simulation of future HPC systems with a focus on emerging device technology, processor architecture, specialized accelerators and reconfigurable computing.